400G QSFP-DD FR4 Transceiver

Part # : WST-QD4-FR4-C

Category : ,



  • 400 Gigabit Ethernet (425 Gbit/s)
  • Compliant to 53.125 GBd PAM4 x 4 wavelength 400G-FR4 optical interface specification
  • Compliant to 26.5625 GBd PAM4 x 8 lane 400GAUI-8 Electrical Interface specification
  • Transmission distance of up to 2 km over duplex SMF.
  • Low power consumption: 12 W max
  • Operating case temperature: 0 to 70°C
  • Hot Z-Pluggable to 76-pad QSFP-DD electrical connector
  • Latching mechanism: Pull tab
  • Two-wire common management interface


Wavesplitter’s WST-QD4-FR4-C is a 400G QSFP56-DD optical transceiver that enables high 400 GbE port densities owing to its compact size and low power consumption. WST-QD4-FR4-C may be used in network applications, such as Ethernet switches and IP routers, at transmission distances of up to 2 km over duplex single mode fiber (SMF). The form factor of WST-QD4-FR4-C - QSFP56-DD Type 2 - is compliant with the hardware and management interface specifications (MIS) of the QSFP-DD multi-source agreement (MSA). QSFP-DD modules can support up to eight electrical lanes on the host interface, which is double the number of lanes supported by QSFP28 or QSFP+ modules. The unique feature of QSFP-DD ports is that they are mechanically and electrically compatible with QSFP28 and QSFP+. Hence, the same port can be used to support multiple generations of modules and data rates if the networking hardware is designed for such operation. WST-QD4-FR4-C transmits data in compliance with the optical interface specification 400G-FR4 defined by the 100G Lambda MSA. 400G-FR4 specifies the use of 4-level pulse amplitude modulation (PAM4) at 53.125 Gbaud operating at four wavelengths on a course wavelength division multiplexed (CWDM) grid. The bit rate per lane is 106.25 Gbit/s, which produces an aggregate data rate of 425 Gbit/s. The electrical interface is in compliance with 400GAUI-8 specified in IEEE 802.3bs-2017. 400GAUI-8 specifies the use of eight differential electrical lanes operating at 26.5625 Gbaud PAM4 per lane. The bit rate per lane is 53.125 Gbit/s, resulting in an aggregate data rate of 425 Gbit/s that matches the optical line interface. An internal gear box IC converts between the eight lanes of the host interface and the four lanes of the line interface. The bit error ratio (BER) of the optical interface is required by 400G-FR4 to be less than 2.4 x 10-4. Hardware using WST-QD4-FR4-C must have KP4 forward error correction (FEC) capability to meet the frame loss ratio requirements of 400 GbE. The specification for KP4-FEC may be found in IEEE 802.3bs-2017.


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